Company DescriptionEstablished in early 2024, at Analogue Insight we are Bridging the Analogue and Digital Worlds for Tomorrow's through our Chiplet Solutions. Our core expertise lies in developing cutting-edge Chiplet technology that serves as the building block for advanced communication systems. Our Chiplets are designed to offer high performance, scalability, and integration flexibility, enabling our clients to achieve breakthroughs in computation speed, data processing, and connectivity.Your Team, Your ImpactThe Analog Layout Engineer will be part of the Engineering’s design Team responsible for the IP development and delivery for Analogue Insight’s products and custom IP development businesses, giving the opportunity to contribute to the successes of key programs.What You Can ExpectLead layout design activity and work closely with design team.Produce high quality IPs/AMS Blocks/Macros.Drive Area estimation, floor planning, placement, routing, power planning, verification, EMIR, ESD-LUP verification and tape out activity.Mentor Junior Analog IC Layout engineers.Develop scripts.You will be reporting to Manager-Layout Design.What We're Looking For5-10+ years of experience in Analog Layout.Minimum Education requirement is bachelor's degree in electrical engineering.Understanding of low parasitic, high frequency design techniques.Excellent understanding of analog layout concepts and issues.Experience in handling blocks and macros layout towards successful, high-quality, and timely execution.Experience with planar process and lower nodes like 28/22 nm in TSMC foundry and GF.Experience with Finfet process and lower nodes like 16/7/6 nm in TSMC foundry.Experience with multiple foundries in lower node e.g.: Samsung, TSMC, GF.Experience with Cadence tools (Virtuoso), Synopsys (CC), Calibre and ICV verification tools like LVS, DRC, Extraction etc.Experience with EMIR, PERC tools.Skill/TCL scripting experience. #J-18808-Ljbffr