Development Verification Engineer

£55,000 - £65,000 + Training + Progression + 10% Bonus

Bristol - Hybrid

Are you a Development Verification Engineer or similar with expertise in SystemVerilog and UVM, seeking an autonomous role where your work directly contributes to the success of a leading semiconductor company, with opportunities for career growth, ongoing development, and the potential to increase your earnings through a 10% company bonus?

This leading semiconductor and microcontroller provider supplies innovative solutions into the automotive and industrial sectors worldwide. With a turnover in the billions and a strong global presence, they support clients in driving efficiency, safety, and sustainability across critical industries.

In this role, you will develop and maintain SystemVerilog, UVM test benches, create new verification components, debug test cases, define functional coverage models, while supporting test bench architecture and design reviews using industry standard EDA tools. This is a full-time role, Monday to Friday, 09:00AM - 17:00PM, with two days per week working from home.

This role would suit a Development Verification Engineer with SystemVerilog and UVM skills, looking to join a world-leading semiconductor company with clear progression, specialist training, and the opportunity to boost earnings through a company bonus.

The Role:

Take the lead in creating and integrating new SV UVM ver...