Join to apply for the Digital Design & Verification Engineer – Graduate / Junior role at microTECH Global LTD

Join to apply for the Digital Design & Verification Engineer – Graduate / Junior role at microTECH Global LTD

Job Title: Digital Design & Verification Engineer – Graduate / Junior

Position: Graduates & Junior

Location: Hertfordshire Hybrid

Salary Range: Negotiable

Client Information

We are building a revolutionary RISC-V-based GPU and AI platform, and we’re hiring talented engineers in Hardware Design and Hardware Verification to join us on this mission. If you thrive on innovation and want to work on cutting-edge vector processing and neural compute technologies, this is your opportunity.

Job Description

Job Title: Digital Design & Verification Engineer – Graduate / Junior

Position: Graduates & Junior

Type: Contract or Permanent

Location: Hertfordshire Hybrid

Salary Range: Negotiable

Client Information

We are building a revolutionary RISC-V-based GPU and AI platform, and we’re hiring talented engineers in Hardware Design and Hardware Verification to join us on this mission. If you thrive on innovation and want to work on cutting-edge vector processing and neural compute technologies, this is your opportunity.

Design Responsibilities

• Assist in implementing RTL for key components of our RISC-V vector core GPU
• Contribute to the design of efficient compute units for graphics and AI applications
• Help refine microarchitectures to meet power, performance, and area (PPA) goals
• Collaborate with senior engineers and verification teams to ensure design quality
• Participate in regular design and code reviews, learning best practices in the process
• Document design work, specifications, and milestones clearly and consistently
• Support synthesis and physical design teams during integration and bring-up phases
  
  

• Develop and maintain UVM/SystemVerilog testbenches for functional verification
• Write both directed and random tests to verify design correctness and improve coverage
• Run regressions and assist with debugging RTL and tracking issues
• Verify functionality at the block and subsystem level in collaboration with design teams
• Learn and apply formal verification methods where appropriate
• Help analyze performance and functional results to validate design behavior
• Work closely with architects and RTL designers in an iterative development cycle
  
  

• 0–2 years of experience in RTL design using SystemVerilog or VHDL
• Solid foundation in digital logic design and computer architecture
• Exposure to or strong interest in GPU, AI accelerators, or vector processors
• Familiarity with RISC-V ISA is a plus, not a must
• Understanding of pipelining, memory hierarchies, or parallel compute concepts
• Interest in learning physical design fundamentals (timing, DFT, floorplanning)
• Experience using EDA tools (e.g., Synopsys, Cadence, or similar) during academic or internship projects
• Scripting knowledge in Python, TCL, or equivalent languages
• BS or MS in Electrical Engineering, Computer Engineering, or a related discipline
  
  

• 0–2 years of hands-on experience with hardware verification (academic or internship projects count)
• Familiar with SystemVerilog and basic UVM concepts
• Interest or exposure to functional coverage, assertions, and constrained-random testing
• Understanding of GPU/AI workloads or RISC-V architecture is a plus
• Experience using simulators like VCS, Questa, or ModelSim
• Comfortable with scripting languages (Python, Perl, or TCL)
• Strong problem-solving skills and willingness to dive into debugging and analysis
• BS or MS in Electrical Engineering, Computer Engineering, or a related discipline
  
  

Seniority level

• Seniority level

  Internship

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Information Technology

• Industries

  Semiconductor Manufacturing

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