We’re supporting a pioneering technology company in Cambridge that’s building cutting-edge control infrastructure for distributed, ultra-low latency systems. As they scale their platform, they’re now seeking a Principal FPGA Engineer to take a key role in developing high-performance digital control and networking subsystems on advanced Xilinx platforms.

This is a senior, hands-on position with influence across architecture, verification, and system integration. You'll be working on time-critical applications involving 10G/25G networking, real-time packet processing, and precision timing—supporting a wider mission that combines hardware, software, and optical systems in a truly novel way.

Key responsibilities:

• Lead FPGA development for timing-critical control systems on Zynq and Ultrascale platforms
• Design and implement low-latency packet processing pipelines and digital interfaces
• Support system-level integration, debug, and performance tuning
• Define and contribute to verification strategies, automation flows, and CI pipelines
• Collaborate with cross-functional teams on architecture and system co-design

Ideal profile:

• Extensive RTL design experience (SystemVerilog/VHDL) with a focus on performance and timing closure
• Hands-on with Vivado, Xilinx SoCs, and high-speed interface protocols (AXI, PCIe, SPI, I2C)
• Strong background in FPGA-based networking or hardware acceleration
• Proficient in Python for scripting, modelling, or tooling
• Comfortable working in a lab with oscilloscopes, logic analysers, and debuggers

This is a high-impact role at the intersection of digital design, hardware-software integration, and precision systems engineering—ideal for a technically strong engineer ready to lead from the front.

If you're interested in the position of Principal FPGA Engineer, please apply or contact Sam Cruse.